The present invention relates to a testing system of a computer, and more particularly relates to a testing system of a computer having a diagnostic processing apparatus which is independent from the computer to be tested.
The conventional testing system of computers of such type will be described briefly with reference to FIG. 1. This system operates such that a computer apparatus 202 is provided with a firmware control unit 209 operative to set fault mode information in order to generate a pseudo-fault in synchronization with a clock signal of the computer apparatus 202. Namely, the fault mode information is set in a fault information register 203 provided in the computer apparatus 202 and a fault enabling bit latch 204 is set so that an output of a decoder 205 is enabled concurrently with this setting to generate a fault or error at a given location of the computer apparatus 202.
The fault processing is effected as follows, when a fault is generated in the computer apparatus 202. Firstly, a particular error indicating flag 207 is turned on to notify a diagnostic processing apparatus 201, through a fault notifying line 210, of the fact that normal operation is disabled. The diagnostic processing apparatus 201 carries out the fault processing when receiving the notice. In the fault processing, the error indicating flags 207 are extracted from the computer apparatus 202, and the error indicating flag 207 etc. is cleared to remove the fault state, and then re-start processing is initiated.
As long as the synchronous operation is held according to the internal clock signal of the computer apparatus 202, fault mode information can be effectively set in the fault information register 203 to repeatedly generate a fault at an identical timing. Further, since the same fault can be recreated, an expectation value of the fault can be suitably set by a program for fault testing, thereby facilitating confirmation of RAS function of the computer apparatus 202 and the diagnostic processing apparatus 201. These processings are illustratively indicated in a flow chart of FIG. 2.
However, an actual fault may occur in the computer apparatus asynchronously with its internal clock. Therefore, an actual fault may not be simultaneously created by a synchronous pseudo-fault generating means. Thus, an asynchronous pseudo-fault generating means is needed to carry out effective RAS function testing.
Next, a brief description is given for the method of generating an asynchronous fault in the computer apparatus 202. During the operation of the computer apparatus 202, for example, its external control signal pin or terminal is clamped to a logical level "0" to fix the logical level of the control signal to generate an asynchronous pseudo-fault. Then, the computer operation, the fault processing and the diagnostic processing are tested. In such case, the external control signal is generally taken from an interface between logical packages.
The clamping of the external control signal pin may cause electrical noise, while the level of the control signal changes asynchronously with the clock signal of the computer apparatus 202. Since an actual hardware fault occurs in an analog mode asynchronously with the operation of the computer apparatus 202, the above noted method can generate a pseudo-fault which is more similar to an actual hardware fault.
However, the following problems may be caused when generating an asynchronous pseudo-fault by the above noted conventional computer testing method. Since highly integrated and sophisticated design is required in the modern computer, it would be quite difficult to generate an asynchronous pseudo-fault by simply clamping the external control signal pin as in the above noted prior art. The reason is that the clamping operation is physically difficult to perform during the operation in view of the hardware construction of the computer, and that a pseudo-fault cannot be generated closely at a particular designated spot by clamping an interface signal between packages. Further, in situations where the computer apparatus, the diagnostic processing apparatus and a terminal are remotely installed from one another, for example, on separate floors, it would be quite inconvenient to access the external control signal pin.